Folding-Free Zero-Noise Extrapolation by Layout-induced Noise Diversity

Abstract

Near term quantum processors operate in a noise dominated regime, motivating error mitigation techniques that recover accurate expectation values without full fault tolerance. Zero Noise Extrapolation (ZNE) is a widely used but biased error mitigation method that lacks rigorous error bounds. Its effective application requires nontrivial technical choices, most notably the selection of noise scaling factors and extrapolation models, making ZNE sensitive to user expertise and often necessitating costly trial and error procedures. Here, we introduce Folding Free Zero Noise Extrapolation (FF-ZNE), a method that removes the need for noise factor selection by achieving effective noise amplification without circuit folding. FF-ZNE exploits isomorphic hardware layouts with distinct native noise profiles, such that executing a fixed circuit across these layouts induces controllable variations in the effective noise strength. Under a depolarizing noise model, we analytically show that the resulting extrapolation admits a fixed linear form, eliminating extrapolator choice and enabling a seamless, user independent mitigation procedure. We further propose two algorithms that identify sets of isomorphic hardware layouts on which a given circuit yields sufficiently distinct expectation values to enable reliable zero noise extrapolation. Experiments on a 133 qubit IBM Quantum device demonstrate that FF-ZNE yields mitigated expectation values with average deviations of ~6% and 4.5% for up to 50 qubit EfficientSU2 (sparse) and Hamiltonian simulation (dense) circuits, respectively. The method is thus scalable and applicable to a broad range of circuits. By eliminating noise factor and extrapolator selection, FF-ZNE transforms zero noise extrapolation from a technique requiring expert tuning into a practical, scalable, and broadly accessible error mitigation method for current quantum hardware.