Low Bit‐Flip Rate Probabilistic Error Cancellation

Abstract

Noise remains one of the most significant challenges in the development of reliable and scalable quantum processors. While quantum error correction and mitigation techniques offer potential solutions, they are often limited by the substantial overhead required. To address this, tailored approaches that exploit specific hardware characteristics have emerged. In quantum computing architectures utilizing cat‐qubits, the inherent exponential suppression of bit‐flip errors can significantly reduce the qubit count needed for effective error correction. In this work, how the unique noise bias of cat‐qubits can be harnessed to enhance error mitigation efficiency is explored. Specifically, it is demonstrated that the sampling cost associated with probabilistic error cancellation (PEC) methods can be exponentially reduced with the depth of the circuit when gates act on cat‐qubits and preserve the noise bias. Similar results also hold for Clifford circuits and Pauli channels. The error mitigation scheme is benchmarked across various quantum machine learning circuits, showcasing its practical advantages for near‐term applications on cat‐qubit architectures.