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Spin Qubits with Scalable milli-kelvin CMOS Control

Samuel K. Bartee, W. Gilbert, Kun Zuo, Kushal Das, T. Tanttu, C. Yang, N. D. Stuyck, S. Pauka, R. Y. Su, W. H. Lim, S. Serrano, C. Escott, F. Hudson, Kohei M. Itoh, A. Laucht, A. Dzurak, David J Reilly·July 21, 2024
Physics

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Abstract

A key virtue of spin qubits is their sub-micron footprint, enabling a single silicon chip to host the millions of qubits required to execute useful quantum algorithms with error correction. With each physical qubit needing multiple control lines however, a fundamental barrier to scale is the extreme density of connections that bridge quantum devices to their external control and readout hardware. A promising solution is to co-locate the control system proximal to the qubit platform at milli-kelvin temperatures, wired-up via miniaturized interconnects. Even so, heat and crosstalk from closely integrated control have potential to degrade qubit performance, particularly for two-qubit entangling gates based on exchange coupling that are sensitive to electrical noise. Here, we benchmark silicon MOS-style electron spin qubits controlled via heterogeneously-integrated cryo-CMOS circuits with a low enough power density to enable scale-up. Demonstrating that cryo-CMOS can efficiently enable universal logic operations for spin qubits, we go on to show that mill-kelvin control has little impact on the performance of single- and two-qubit gates. Given the complexity of our milli-kelvin CMOS platform, with some 100-thousand transistors, these results open the prospect of scalable control based on the tight packaging of spin qubits with a chiplet style control architecture.

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